(1) Field of the Invention
The present invention relates to multithreaded computer systems including multiprocessor elements that operate in parallel, and particularly to a multithreaded computer system and a multithread execution control method that switch programs in each processor element.
(2) Description of the Related Art
There are parallel processing systems that have a multiprocessing architecture including plural processor elements in order to provide an enhanced processing capability.
In some cases, in order to further enhance the processing capability, the parallel processing systems employ a method in which one process is divided into plural control flows (programs) called “threads”, and the threads are executed in parallel by plural processors.
For example, Japanese Laid-Open Patent Publication No. 11-282815 discloses a conventional method for use with a parallel processing system that have a multiprocessing architecture in which plural threads are executed in parallel as described above.
When looking at one processor in the parallel processing system, a single processor element executes plural threads while switching the threads in accordance with predetermined factors. With this control, the single processor element causes the threads to be executed in parallel in a pseudo manner. In this case, each thread is executed to exclusively occupy a single processor, and therefore can be conceived as being individually assigned to and executed by a virtual processor.
Each virtual processor is not necessarily required to have all functions of a real processor, and may have only information required for executing the threads. The information required for executing the threads includes thread-specific control information and data information such as program counters, flag registers, stack areas and general-purpose registers. These pieces of information are referred to as the “contexts”.
In order to switch a thread that is currently being executed by a single processor element to another thread, it is necessary to switch contexts. Typically, the contexts are stored in memory, and therefore switching the contexts involves writing the context for the thread that is currently being executed into the memory (referred to herein as “save”) and reading the context for the next thread to be executed from the memory (referred to herein as “restore”).
Incidentally, in the method described in Japanese Laid-Open Patent Publication No. 11-282815 (FIG. 2 of this Publication), thread preemption (switching to a thread with a higher priority level) is accepted by hardware, rather than by an operating system, and the operating system does not intervene with a switching process after the acceptance of the preemption, which provides high-speed user level interruption to enhance the efficiency of multithread processing. In this method, however, every time the threads are switched, a thread scheduler present in a user process is executed by a processor element, thereby scheduling all threads included in the user process.